Refining the CCU
Last Edit November 2, 1996; May 1, 1999; July 7, 2001
AMD's Am2910 - A Slick Control Solution
Figure 4-7 AMD's Am2910 Supersequencer - now obsolete - solved
many of the CCU construction problems
The block diagram of the Am2910 is shown in Figure 4-8. This device
is controlled by a 4-bit instruction, which would be supplied from
one field of the microword format of the system. These four bits
provide 16 basic instructions, which are similar but not identical
with Am29811A instructions. They are discussed in detail in this
Figure 4-8 Am2910 Block Diagram
The Am2910 can address up to 4K of PROM/ROM memory. Unused address
lines are left floating at the output; the corresponding Di
inputs should be tied to ground. It provides three output enables
controls: PL', MAP', and VECT' (all are complementary - i.e., should
have overbars). The 4-bit instruction, the result of the CC', CCEN'
inputs and the internal zero detect for the register/counter all
are inputs to an onboard instruction PLA (programmable logic array).
The PLA provides the internal controls which correspond to the next-address
control logic. The next address can be from one of four sources:
- the microprogram counter (uPC)
- the LIFO stack (F)
- the register/counter (R)
- or direct input (D) from whatever is connected to the Di inputs.
Di is connected to the tristated outputs of the vector map, the
mapping PROM, and the pipeline in the example CCU developed so far.