Logic Design for Array-Based Circuits
Copyright © 1996, 2001, 2002 Donnamaie E. White
Faults and Fault Detection
Last Edit July 22, 2001
Extension to Three-State and Bidirectional Structures
Three-state and bidirectional structures, such as TTL three-state outputs and bidirectional I/O macros, may be tested using the Minimal Test Sequence. The states for which the Existence Function map shows a Z (for three-state) or a PAD (for bidirectional macro in input mode) are mapped along with the conventional points with a value of one. The EN enable is treated as any other input. The same link formation rules apply.
The differences are:
Using the same basic rules as before with these additions, a Minimal Test Sequence was successfully developed for both a TTL three-state output and a bidirectional I/O macro.
Extension to Sequential Circuits
Sequential circuits are testable with the Minimal Test Sequence. The sequence is applied after the circuit is initialized.
The Existence Function is developed mapping the Qn points representing "hold previous value". These are handled in the same manner as the Z or PAD values of the three-state and bidirectional devices.
Violations of the rules requiring an observable output to change state occur when a 1-Qn or 0-Qn link is used. In fact, a sequential circuit must test HOLD 0 and HOLD 1. The sequence must include 1-Qn-1 and 0-QN-0 connections.
A sequential device with a set or reset must be tested as shown in Table 9-6.
Table 9-6 Sequential Device
For reference, test sequences for SSI logic are listed on Advanced Logic Circuit Design Techniques, page 259 of Svoboda, White, Garland STPM Press, 1974. Simplistic invertors and non-inverting drivers are not listed. Several combinational circuits are examined in detail. They were chosen based on their characteristics and cover a range of difficult test situations. A three-state output, a bidirectional I/O, a latch and a D flip/flop macro are examined here.