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Logic Design for Array-Based Circuits

by Donnamaie E. White

Copyright © 1996, 2001, 2002 Donnamaie E. White

 

Faults and Fault Detection

Last Edit July 22, 2001


Simple Gates - Sequences

The Existence Functions for the SSI gates NAND and NOR are shown in Figure 9-6. The Existence Functions for the SSI gates AND and OR are shown in Figure 9-7. In both figures, the gate, the logic equation it represents and a Marquand Map of the Existence Function is shown. Marquand maps date from the 1880's.

Figure 9.6 Simple SSI Gates: NAND, NOR

Figure 9.7 Simple SSI Gates: AND, OR

The logical distance 1 edges are also shown. The test sequence can start at any node, and traverses each link in both directions. The sequences for the AND and OR gates are shown in Figure 9-8. An analysis of the fault coverage for the AND gate sequence is shown in Figure 9-9.

Figure 9-8 AND, OR Gate Minimal Sequences

Y1 C B A Y2 C B A
1 1 1 1 0 0 0 0
0 0 1 1 1 0 0 1
1 1 1 1 0 0 0 0
0 1 0 1 1 0 1 0
1 1 1 1 0 0 0 0
0 0 1 1 1 1 0 0
1 1 1 1 0 0 0 0

Figure 9.9 Sequence Analysis - AND Gate

Y1 C B A FAULTS COVERED
1 1 1 1 Y1 SA0; A or B or C SA0
0 0 1 1 C SA1; Y1 SA1
1 1 1 1 Y1 SA0; A or B or C SA0
0 1 0 1 B SA1; Y1 SA1
1 1 1 1 Y1 SA0; A or B or C SA0
0 0 1 1 A SA1; Y1 SA1
1 1 1 1 Y1 SA0; A or B or C SA0

 

 

 

Copyright @ 2001, 2002 Donnamaie E. White, White Enterprises
For problems or questions on these pages, contact dew@Donnamaie.com




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