Logic Design for Array-Based Circuits
Copyright © 1996, 2001, 2002 Donnamaie E. White
Sizing the Design - Selecting the Array
Last Edit July 22, 2001
As the arrays have become larger and dissipate more power, thermal characteriza tion becomes an increasingly important issue. Some means of evaluating array junc tion temperature must be developed for each array series.
For some of these series, macros have been developed that allow the designer to add one or more thermal diodes to the design. The macros are treated as any other macro and are placed on interface cells.
Newer arrays, such as the Q20000 Series, have thermal diodes built into the base array. The Q20000 Series arrays have a thermal diode structure embedded in the base and brought out to dedicated or fixed pads. These pads must be brought out to package pins. These pads are not accessible to any other macro function.
Example - AMCC thermal diodes (1994)
Thermal diode macros exist for the Q14000 and Q5000 Series libraries and the de signer is required to add one thermal diode macro pair per circuit. Using more than one was found to be unnecessary as the thermal gradient across the chips was found to be insignificant. Where there might be doubt, additional thermal diode pairs can be added. Each pair uses two I/O cells. (See Figure 3-8.) One earlier version of the implementation also used one internal cell. No differences were found to exist be tween these two versions.
Thermal diode macros also exist for the Q20000 Series for those cases where a second thermal diode measurement is felt to be necessary.
Figure 3-8 Thermal Diode Pair
The AMCC AC Speed Monitor
AC testing is a problem for both the designer and the vendor and to reduce the problems associated with it, the Q20000 Series arrays each has a built-in AC speed monitor with two fixed pads assigned to it. These pads must be brought out to package pins.
Threshold generators - routable generators
The designer is not usually concerned with the threshold generators. In cases where they are required, they may only need identification and routing connections rather than actual cell placement.
VBB Reference voltages
There are some instances where VBB reference voltages are desired, where I/O utili zation is high and the designer is using single-rail ECL where differential ECL is re quired. These reference voltages are supplied with a macro and are placed on an interface cell. They will connect to external package pins.
Speed and testing interface cell utilization
Maximum speed of operation and testing requirements will have an affect on the final interface cell count. For very high speeds, differential ECL may be required by the array vendor, doubling the cell and pad counts of those signals.
Testing may require that parts of the circuit are degated while other parts are being tested. This will occur when a simultaneously switching group is very large, including the simultaneous enable-disable of three-state or bidirectional macros. Test-enables may be required to partition the circuit for testing, and test enables will use cells and pads.
Population or cell type limits and utilization
Where population restrictions exist, circumvention of the limits may the include the addition of interface macros. For example, a single-cell bidirectional macro limit would result in two-cell bidirectional macros being used for additional bidirectional signals. The single-cell 25 ohm ECL termination, if dual power supplies are not available would result in two-cell 25-ohm terminations.
High-frequency signals in particular will often require placement in specific cell loca tions and require that these macros be isolated with added grounds. Added grounds use pads and disable the accompanying cell.
Where placement restrictions require the addition of macros or a change in the macros selected, the effects on cell utilization must be anticipated in the initial estimate.