ShareCG: ASICs .. the Book

Chapter start ] [ Previous page ] [ Next page ]


8.4  Summary

The important concepts covered in this chapter are:

  • FPGA design flow: design entry, simulation, physical design, and programming
  • Schematic entry, hardware design languages, logic synthesis
  • PALASM as a common low-level hardware description
  • EDIF, Verilog, and VHDL as vendor-independent netlist standards

Chapter start ] [ Previous page ] [ Next page ]




© 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us
ShareCG™ is a trademark of Internet Business Systems, Inc.

Report a Bug Report Abuse Make a Suggestion About Privacy Policy Contact Us User Agreement Advertise